CENTRE FOR HIGH PERFORMANCE COMPUTING (CHPC)
centre focuses on multi-core and many-core
architecture based research on CPU and GPU based parallel
and optimizations. This centre also focuses on use of machine learning on big data and security a nalysis using parallel architectures,
optimizing Neutral Networks on Computer Unified Device Architecture (CUDA) based GPUs. This centre was started with an intention
to provide a facility to carry out teaching and research work for the interested faculty members and students of NMAMIT.
Several summer internships have been completed at CHPC. It has been recognized as CUDA teaching centre since June 2012. The centre
has an academic alliance with AMD, Intel etc. The centre was established in the year 2011 with a funding of Rs.2.91 Lakhs from NVIDIA
Pune. The building space of the centre is 240 sq.ft.
The Thrust Areas of CHPC are:
- Parallel programming
- Parallel algorithms
- Compiler design and optimization
- Parallel Computer Architecture
- Multi-core programming and optimizations
- GPU programming and optimizations
The activities of CHPC are:
- Special training for the students during summer apart from elective courses
- Encourage students to take-up research oriented projects
- Motivating students for higher education in this area and to apply for internships and jobs in various HPC industries
CHPC has the following facilities:
- Five Intel(R) Core™ i7-2600 CPU @ 3.40 GHz Computers with NVIDIA GTX470 cards
- CISC Server: HPML150G6 Server HP
- Power-RISC Model: IBM: Server 1:9110 Model 51A IBM power
- X-86 CISC Quad core Processor: HP Z600 workstation Base Unit (Intel Xeon E5520 2.26 8MB/ 1066 QC CPU-1), with Monitor
The achievements of CHPC in general are:
- Successful completion of several summer internships
- Faculty and students have presented and published their work in various international conferences and journals
- Recognized Computer Unified Device Architecture (CUDA) teaching centre since June, 2012.
- Have an academic alliance with AMD, Intel etc.
NMAMIT-CHPC students with Prof.
Sadayappan from Ohio State University
AWARDS / DISTINCTIONS
CHPC has won the following awards:
For the paper entitled “Graphics Processing Unit (GPU) Implementation Methodology of AERMOD model”, Best paper prize was awarded at 2nd International Conference on Recent Advances in Sciences and Engineering-ICRASE- 2013 held during 29-30th April, 2013, organized by Association of Scholars and Professional-ASP at Hyderabad, India.
Received citation from NVIDIA Executive for Best NVIDIA University Relations Coordinator.
3. CUDA Teaching Centre
Since June 2012 Computer Unified Device Architecture (CUDA) teaching centre is recognized as teaching centre by NVIDIA (India).
Unit (GPU) Implementation
Journal of Systems,
Algorithms and Applications. Volume 3, 2013.
2. ‘‘New Sparse Matrix Storage Format to Improve the Performance of Total SPMV Time’’. Scalable Computing: Practice and Experience. Vol.13(2).
4. ‘‘Graphics Processing Unit (GPU) Implementation Methodology of AERMOD model’’. 2nd International Conference on Recent Advances in Sciences and Engineering-ICRASE-2013. 29th to 30th April, 2013. Organized by Association of Scholars and Professional-ASP at Hyderabad, India.
‘‘ Study and
Enhancement of CETUS- A Source to Source Compiler ’’. International Conference
and Communication Technology
24th December 2011, page 145-148.
6. ‘‘C2O: Communication and Computation Optimizer for the Graphics Processor Architecture’’. International Conference on High Performance Computing (HIPC- SRS-2011-Poster), Bangalore.
18th to 21st December-2011.
7. ‘‘CSPR: Column only Sparse Matrix Representation for Performance Improvement on GPU Architecture’’, International Conference on Parallel, Distributed Computing Technologies and Applications (PDCTA-2011) in conjunction with CCSEIT-2011, Tirunelvelli, Tamil Nadu, India. Organized by AIRCC (Academy and Industry Research Collaboration Center).
8. ‘‘Multithreaded Programming Framework Development for gcc Infrastructure’’. 3rd International Conference on Computer Research and Development (ICCRD 2011), Shanghai, China. 11th-13th March 2011, 54 - 57pp9. ‘‘Framework for Interactive and Semi-Automatic Program Optimization Tool for Multi Core Architectures’’, International Conference on Computer and Information Science and Engineering (ICCISE)-2011 , Dubai, Organized by World Academy of Science, Engineering and Technology (WASET), 25-27, January-2011.